The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 19, 2025
Filed:
Sep. 24, 2021
Intel Corporation, Santa Clara, CA (US);
Kevin P. O'brien, Portland, OR (US);
Uygar E. Avci, Portland, OR (US);
Scott B. Clendenning, Portland, OR (US);
Chelsey Dorow, Portland, OR (US);
Sudarat Lee, Hillsboro, OR (US);
Kirby Maxey, Hillsboro, OR (US);
Carl H. Naylor, Portland, OR (US);
Tristan A. Tronic, Aloha, OR (US);
Shriram Shivaraman, Hillsboro, OR (US);
Ashish Verma Penumatcha, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment, a semiconductor device comprises a first transistor on a first level, and a second transistor on a second level above the first level. In an embodiment, an insulating layer is between the first level and the second level, and a via passes through the insulating layer, and electrically couples the first transistor to the second transistor. In an embodiment, the first transistor and the second transistor comprise a first channel, and a second channel over the first channel. In an embodiment, the first second transistor further comprise a gate structure between the first channel and the second channel, a source contact on a first end of the first channel and the second channel, and a drain contact on a second end of the first channel and the second channel.