The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2025

Filed:

Mar. 06, 2023
Applicant:

Amkor Technology Singapore Holding Pte. Ltd., Singapore, SG;

Inventors:

Jin Young Kim, Seoul, KR;

Ji Young Chung, Gyeonggi-do, KR;

Doo Hyun Park, Gyeonggi-do, KR;

Choon Heung Lee, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 25/10 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 24/02 (2013.01); H01L 21/563 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/3142 (2013.01); H01L 23/5385 (2013.01); H01L 23/5389 (2013.01); H01L 25/105 (2013.01); H01L 21/4857 (2013.01); H01L 23/3128 (2013.01); H01L 23/5387 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68372 (2013.01); H01L 2224/023 (2013.01); H01L 2224/02319 (2013.01); H01L 2224/02371 (2013.01); H01L 2224/02373 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/13124 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/1316 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81001 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/92125 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01);
Abstract

A semiconductor device with redistribution layers formed utilizing dummy substrates is disclosed and may include forming a first redistribution layer on a first dummy substrate, forming a second redistribution layer on a second dummy substrate, electrically connecting a semiconductor die to the first redistribution layer, electrically connecting the first redistribution layer to the second redistribution layer, and removing the dummy substrates. The first redistribution layer may be electrically connected to the second redistribution layer utilizing a conductive pillar. An encapsulant material may be formed between the first and second redistribution layers. Side portions of one of the first and second redistribution layers may be covered with encapsulant. A surface of the semiconductor die may be in contact with the second redistribution layer. The dummy substrates may be in panel form. One of the dummy substrates may be in panel form and the other in unit form.


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