The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Aug. 05, 2022
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Armin Saeedi Vahdat, Burlington, MA (US);

John Hautala, Beverly, MA (US);

Yan Zhang, Westford, MA (US);

Johannes M. Van Meer, Middleton, MA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/053 (2023.02); H10B 12/34 (2023.02);
Abstract

Approaches for reducing GIDL are disclosed. In one example, a method of forming a DRAM device may include forming a trench in a substrate layer, providing a first gate oxide layer along a sidewall and a bottom surface of the trench, and forming a first gate material within the trench. The method may further include removing the first gate oxide layer along an upper portion of the sidewall of the trench by delivering ions into the upper portion of the trench at a non-zero angle relative to a perpendicular extending from an upper surface of the substrate layer, and forming a second gate oxide layer along the upper portion of the sidewall of the trench, wherein a first dielectric constant of the first gate oxide layer is greater than a second dielectric constant of the second gate oxide layer.


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