The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Jul. 10, 2024
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chen-Hua Yu, Hsinchu, TW;

Jiun Yi Wu, Zhongli, TW;

Hsing-Kuo Hsia, Jhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); G02B 6/122 (2006.01); H01L 21/48 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/522 (2006.01); H01L 23/538 (2006.01); H01L 23/66 (2006.01); H10B 80/00 (2023.01); H10F 71/00 (2025.01); H10F 77/00 (2025.01);
U.S. Cl.
CPC ...
H01L 25/167 (2013.01); G02B 6/122 (2013.01); H01L 21/4857 (2013.01); H01L 21/76871 (2013.01); H01L 23/49833 (2013.01); H01L 23/5226 (2013.01); H01L 23/5385 (2013.01); H01L 23/66 (2013.01); H01L 24/08 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H10B 80/00 (2023.02); H10F 71/00 (2025.01); H10F 77/93 (2025.01); H01L 21/4853 (2013.01); H01L 23/49816 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 2223/6627 (2013.01); H01L 2224/02371 (2013.01); H01L 2224/13021 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83102 (2013.01); H01L 2924/0635 (2013.01);
Abstract

An embodiment device includes: a first dielectric layer; a first photonic die and a second photonic die disposed adjacent a first side of the first dielectric layer; a waveguide optically coupling the first photonic die to the second photonic die, the waveguide being disposed between the first dielectric layer and the first photonic die, and between the first dielectric layer and the second photonic die; a first integrated circuit die and a second integrated circuit die disposed adjacent the first side of the first dielectric layer; conductive features extending through the first dielectric layer and along a second side of the first dielectric layer, the conductive features electrically coupling the first photonic die to the first integrated circuit die, the conductive features electrically coupling the second photonic die to the second integrated circuit die; and a second dielectric layer disposed adjacent the second side of the first dielectric layer.


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