The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2025
Filed:
Feb. 26, 2024
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Lizabeth Keser, Munich, DE;
Bernd Waidhas, Pettendorf, DE;
Thomas Ort, Veitsbronn, DE;
Thomas Wagner, Regelsbach, DE;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H10D 1/20 (2025.01); H10D 1/68 (2025.01);
U.S. Cl.
CPC ...
H01L 23/3114 (2013.01); H01L 21/568 (2013.01); H01L 23/5226 (2013.01); H01L 24/11 (2013.01); H01L 24/14 (2013.01); H01L 24/96 (2013.01); H01L 2224/02379 (2013.01); H01L 2924/19011 (2013.01); H10D 1/20 (2025.01); H10D 1/68 (2025.01);
Abstract
A semiconductor device and method of including peripheral devices into a package is disclosed. In one example, a peripheral device includes a passive device such as a capacitor or an inductor. Examples are shown that include a peripheral device that is substantially the same thickness as a die or a die assembly. Examples are further shown that use this configuration in a fan out process to form semiconductor devices.