The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Nov. 03, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Fu-Chen Chang, New Taipei, TW;

Kuo-Chi Tu, Hsinchu, TW;

Tzu-Yu Chen, Kaohsiung, TW;

Sheng-Hung Shih, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 51/30 (2023.01); G11C 11/22 (2006.01); H01L 49/02 (2006.01); H10B 51/10 (2023.01); H10B 53/00 (2023.01); H10B 53/30 (2023.01);
U.S. Cl.
CPC ...
H10B 51/30 (2023.02); G11C 11/223 (2013.01); H01L 28/57 (2013.01); H01L 28/60 (2013.01); H10B 51/10 (2023.02); H10B 53/00 (2023.02); H10B 53/30 (2023.02);
Abstract

A semiconductor device includes a random access memory (RAM) structure and a dielectric layer. The RAM structure is over a substrate and includes a bottom electrode layer, a ferroelectric layer over the bottom electrode layer, and a top electrode layer over the ferroelectric layer. The dielectric layer is over the substrate and laterally surrounds a lower portion of the RAM structure. From a cross-sectional view, the bottom electrode layer of the RAM structure has a lateral portion and a vertical portion, and the vertical portion upwardly extends from the lateral portion to a position higher than a top surface of the dielectric layer.


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