The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Jun. 07, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Hsiao-Kuan Wei, Longtan Township, TW;

Hsien-Ming Lee, Changhua, TW;

Chin-You Hsu, Hsinchu, TW;

Hsin-Yun Hsu, Taoyuan, TW;

Pin-Hsuan Yeh, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2025.01); H01L 21/02 (2006.01); H01L 21/285 (2006.01); H01L 21/3213 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 64/01 (2025.01); H10D 64/66 (2025.01); H10D 64/68 (2025.01);
U.S. Cl.
CPC ...
H01L 21/28185 (2013.01); H01L 21/02321 (2013.01); H01L 21/28556 (2013.01); H01L 21/32134 (2013.01); H10D 64/01 (2025.01); H10D 64/667 (2025.01); H10D 64/685 (2025.01); H01L 21/28088 (2013.01); H01L 21/28097 (2013.01); H01L 21/28518 (2013.01); H01L 21/28568 (2013.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01);
Abstract

Generally, the present disclosure provides example embodiments relating to formation of a gate structure of a device, such as in a replacement gate process, and the device formed thereby. In an example method, a gate dielectric layer is formed over an active area on a substrate. A dummy layer that contains a passivating species (such as fluorine) is formed over the gate dielectric layer. A thermal process is performed to drive the passivating species from the dummy layer into the gate dielectric layer. The dummy layer is removed. A metal gate electrode is formed over the gate dielectric layer. The gate dielectric layer includes the passivating species before the metal gate electrode is formed.


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