The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

Jan. 10, 2023
Applicant:

Toray Engineering Co., Ltd., Tokyo, JP;

Inventors:

Katsumi Terada, Otsu, JP;

Kenji Hamakawa, Otsu, JP;

Takashi Hare, Otsu, JP;

Yasushi Tamura, Otsu, JP;

Kensuke Tashima, Otsu, JP;

Takashi Yoneda, Otsu-shi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 13/08 (2006.01); H01L 23/00 (2006.01); H05K 13/04 (2006.01);
U.S. Cl.
CPC ...
H01L 24/75 (2013.01); H01L 24/83 (2013.01); H05K 13/04 (2013.01); H05K 13/0812 (2018.08); H05K 13/0815 (2018.08); H01L 2224/75252 (2013.01); H01L 2224/7565 (2013.01); H01L 2224/75745 (2013.01); H01L 2224/75753 (2013.01); H01L 2224/75804 (2013.01); H01L 2224/75824 (2013.01); H01L 2224/8313 (2013.01); H01L 2224/83132 (2013.01); H01L 2224/83201 (2013.01);
Abstract

A mounting device comprises a substrate stage, a mounting head, an elevating unit, a recognition mechanism, and a control unit. The recognition mechanism acquires position information about a chip recognition mark and a substrate recognition mark using an imaging unit. The control unit calculates an amount of positional deviation between a chip component and a substrate from the position information about the chip recognition mark and the substrate recognition mark, and performs alignment by driving the mounting head and/or the substrate stage according to the amount of the positional deviation. The chip component and the substrate are brought closer with each other and the alignment is performed in a state in which the imaging unit simultaneously images the chip recognition mark and the substrate recognition mark within a depth of field, after which the chip component and the substrate are brought into close contact with each other.


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