The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

Nov. 07, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Pochun Wang, Hsinchu, TW;

Ting-Wei Chiang, Hsinchu, TW;

Chih-Ming Lai, Hsinchu, TW;

Hui-Zhong Zhuang, Hsinchu, TW;

Jung-Chan Yang, Hsinchu, TW;

Ru-Gun Liu, Hsinchu, TW;

Ya-Chi Chou, Hsinchu, TW;

Yi-Hsiung Lin, Hsinchu, TW;

Yu-Xuan Huang, Hsinchu, TW;

Yu-Jung Chang, Hsinchu, TW;

Guo-Huei Wu, Hsinchu, TW;

Shih-Ming Chang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); G06F 30/39 (2020.01); G06F 30/392 (2020.01); H01L 21/768 (2006.01); H01L 23/535 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H01L 23/535 (2013.01); G06F 30/39 (2020.01); G06F 30/392 (2020.01); H01L 21/76895 (2013.01); H10D 84/0193 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01); H10D 84/853 (2025.01);
Abstract

An integrated circuit includes a first and second active region, a first conductive structure, an insulating region, a set of gates and a set of contacts. The first and second active region are in a substrate, extend in a first direction, are located on a first level, and being separated from one another in a second direction. The first conductive structure extends in the first direction, is located on the first level, and is between the first and second active region. The insulating region is located on at least the first level, and is between the first and second active region and the first conductive structure. The set of gates extend in the second direction, overlap the first conductive structure, and is located on a second level. The set of contacts extend in the second direction, overlap the first conductive structure, and is located on the second level.


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