The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2025
Filed:
Mar. 01, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Cheng-Hsien Hsieh, Kaohsiung, TW;
Li-Han Hsu, Hsin-Chu, TW;
Wei-Cheng Wu, Hsinchu, TW;
Der-Chyang Yeh, Hsin-Chu, TW;
Wei-Chih Lai, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A method of forming an integrated circuit package includes following operations. A padding layer is formed on a portion of a carrier. A first semiconductor die is placed on the padding layer and a second semiconductor die is placed on the carrier. The first semiconductor die and the second semiconductor die are encapsulated with a first encapsulation layer. A first redistribution layer structure is formed over the first semiconductor die, the second semiconductor die and the first encapsulation layer. A third semiconductor die is placed on the first redistribution layer structure. The third semiconductor die is encapsulated with a second encapsulation layer. A second redistribution layer structure is formed over the third semiconductor die and the second encapsulation layer. The carrier is debonded. The padding layer is removed, and therefore, a recess is formed in the first encapsulation layer.