The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Jan. 20, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chien-Wei Lee, Kaohsiung, TW;

Yen-Ting Chen, Taichung, TW;

Wei-Yang Lee, Taipei, TW;

Chia-Pin Lin, Xinpu Township, Hsinchu County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 30/67 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01);
U.S. Cl.
CPC ...
H10D 62/118 (2025.01); H10D 30/6713 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/115 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/0151 (2025.01); H10D 84/038 (2025.01);
Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a fin structure over the base. The semiconductor device structure includes an isolation structure over the base and surrounding a lower portion of the fin structure. The semiconductor device structure includes a gate stack wrapped around an upper portion of the fin structure. The semiconductor device structure includes a source/drain structure partially embedded in the isolation structure and the lower portion of the fin structure. The source/drain structure has an undoped semiconductor layer and a first doped layer over the undoped semiconductor layer, and the undoped semiconductor layer separates the first doped layer from the isolation structure.


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