The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 2025
Filed:
Jan. 24, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Atul Katoch, Kanata, CA;
Sergiy Romanovskyy, Ottawa, CA;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
Systems, methods, and devices are described herein for a word line interlock circuit. A device includes a first logic gate, an interlock circuit, and a delay circuit. The first logic gate is configured to receive a reset signal. The interlock circuit is coupled to an output of the first logic gate and is configured to generate a first signal and selectively operate the first logic gate. The delay circuit is coupled to an output of the interlock circuit and is configured to receive the first signal from the interlock circuit and delay the first signal to generate a clock pulse width signal that is fed back to the interlock circuit. In response to the reset signal changing logic states, the selective operation of the first logic gate prevents changing edges of the reset signal from being transmitted to the delay circuit.