The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2025
Filed:
Jun. 21, 2023
Stmicroelectronics S.r.l., Agrate Brianza, IT;
Stmicroelectronics International N.v., Geneva, CH;
Nitin Chawla, Noida, IN;
Anuj Grover, New Delhi, IN;
Giuseppe Desoli, San Fermo Della Battaglia, IT;
Kedar Janardan Dhori, Ghaziabad, IN;
Thomas Boesch, Rovio, CH;
Promod Kumar, Greater Noida, IN;
STMICROELECTRONICS S.r.l., Agrate Brianza, IT;
STMicroelectronics International N.V., Geneva, CH;
Abstract
Systems and devices are provided to enable granular control over a retention or active state of each of a plurality of memory circuits, such as a plurality of memory cell arrays, within a memory. Each respective memory array of the plurality of memory arrays is coupled to a respective ballast driver and a respective active memory signal switch for the respective memory array. One or more voltage regulators are coupled to a ballast driver gate node and to a bias node of at least one of the respective memory arrays. In operation, the respective active memory signal switch for a respective memory array causes the respective memory array to transition between an active state for the respective memory array and a retention state for the respective memory array.