The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2025

Filed:

Jul. 06, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Kuo-Pi Tseng, Hsinchu, TW;

De-Fang Chen, Hsinchu, TW;

Chao-Cheng Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2005.12); H01L 21/3065 (2005.12); H01L 21/8234 (2005.12); H01L 29/66 (2005.12); H01L 29/78 (2005.12);
U.S. Cl.
CPC ...
H01L 27/0924 (2012.12); H01L 21/3065 (2012.12); H01L 21/823418 (2012.12); H01L 21/823431 (2012.12); H01L 29/66795 (2012.12); H01L 29/7851 (2012.12);
Abstract

A device includes a substrate, a channel layer, a gate structure, a first source/drain epitaxial structure, a second source/drain epitaxial structure, and a bottom dielectric structure. The channel layer is over the substrate. The gate structure is across the channel layer. The first source/drain epitaxial structure and the second source/drain epitaxial structure are on opposite sides of the channel layer and are connected to the channel layer. The bottom dielectric structure is between the first source/drain epitaxial structure and the substrate. A maximum width of the first source/drain epitaxial structure is greater than or equal to a maximum width of the bottom dielectric structure in a cross-sectional view.


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