The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2025

Filed:

Apr. 24, 2024
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Lung-Kun Chu, Hsinchu, TW;

Jia-Ni Yu, Hsinchu, TW;

Chun-Fu Lu, Hsinchu, TW;

Kuo-Cheng Chiang, Hsinchu, TW;

Chih-Hao Wang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 21/475 (2006.01); H01L 21/4757 (2006.01); H01L 21/477 (2006.01); H01L 27/088 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 21/477 (2013.01); H01L 21/475 (2013.01); H01L 21/47573 (2013.01); H01L 27/0886 (2013.01); H01L 29/42392 (2013.01); H01L 29/517 (2013.01);
Abstract

A method for processing an integrated circuit includes forming a plurality of transistors. The method utilizes a reversed tone patterning process to selectively drive dipoles into the gate dielectric layers of some of the transistors while preventing dipoles from entering the gate dielectric layers of other transistors. This process can be repeated to produce a plurality of transistors each having different threshold voltages.


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