The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2025

Filed:

Jan. 24, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Tsung-Hsien Chiang, Hsinchu, TW;

Hsien-Ming Tu, Hsinchu County, TW;

Hao-Yi Tsai, Hsinchu, TW;

Tin-Hao Kuo, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01); B23K 26/352 (2014.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); B23K 101/40 (2006.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); B23K 26/352 (2015.10); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 23/3128 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 23/5389 (2013.01); H01L 23/562 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); B23K 2101/40 (2018.08); H01L 2223/54406 (2013.01); H01L 2224/214 (2013.01);
Abstract

A semiconductor package includes an encapsulated semiconductor device, a backside redistribution structure, and a front side redistribution structure. The encapsulated semiconductor device includes an encapsulating material and a semiconductor device encapsulated by the encapsulating material. The backside redistribution structure is disposed on a backside of the encapsulated semiconductor device and includes a redistribution circuit layer and a first patterned dielectric layer. The redistribution circuit layer has a circuit pattern and a dummy pattern electrically insulated from the circuit pattern. The dummy pattern is overlapped with the semiconductor device from a top view of the semiconductor package. The first patterned dielectric layer is disposed on the redistribution circuit layer and includes a marking pattern disposed on the dummy pattern and revealing a part of the dummy pattern. The front side redistribution structure is disposed on a front side of the encapsulated semiconductor device and electrically connected to the semiconductor device.


Find Patent Forward Citations

Loading…