The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Aug. 21, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Ching-Hua Lee, Hsinchu, TW;

Miao-Syuan Fan, Hsinchu, TW;

Ta-Hsiang Kung, New Taipei, TW;

Jung-Wei Lee, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 29/16 (2006.01); H01L 29/24 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/76 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7606 (2013.01); H01L 21/02568 (2013.01); H01L 21/0259 (2013.01); H01L 29/0665 (2013.01); H01L 29/0673 (2013.01); H01L 29/1606 (2013.01); H01L 29/24 (2013.01); H01L 29/42392 (2013.01); H01L 29/66969 (2013.01); H01L 29/78696 (2013.01);
Abstract

A semiconductor device includes a substrate, a semiconductor structure suspending over the substrate and comprising a source region, a drain region, and a channel region disposed between the source region and the drain region. The channel region includes a doped two-dimensional (2D) material layer comprising a first portion on an upper surface of the channel region. The semiconductor device also includes an interfacial layer surrounding the channel region including the first portion of the doped 2D material layer, and a gate electrode surrounding the interfacial layer.


Find Patent Forward Citations

Loading…