The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Feb. 03, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Meng-Sheng Chang, Hsinchu County, TW;

Yao-Jen Yang, Hsinchu County, TW;

Yih Wang, Hsinchu, TW;

Fu-An Wu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 5/06 (2006.01); G11C 8/08 (2006.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01); H01L 23/522 (2006.01); H01L 23/525 (2006.01); H10B 20/25 (2023.01);
U.S. Cl.
CPC ...
G11C 7/1096 (2013.01); G11C 5/063 (2013.01); G11C 7/1069 (2013.01); G11C 8/08 (2013.01); G11C 17/165 (2013.01); G11C 17/18 (2013.01); H01L 23/5226 (2013.01); H01L 23/5252 (2013.01); H10B 20/25 (2023.02);
Abstract

A method includes: coupling a first gate to a first word line through a first gate via, wherein the first gate extends along a first direction; coupling the first gate to a second word line through a second gate via, wherein each of the first gate, a second gate, the first gate via and the second gate via is disposed on a first active area which extends along the second direction, wherein the second gate extends along the first direction and is separated from the first gate along a second direction; coupling the first active area to a first bit line through a first conductive via; and aligning the first gate via, the second gate via and the a first conductive via with each other along the second direction.


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