The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 2025
Filed:
Jun. 16, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Chun-Yuan Chen, Tainan, TW;
Ching-Chun Wang, Tainan, TW;
Dun-Nian Yaung, Taipei, TW;
Hsiao-Hui Tseng, Tainan, TW;
Jhy-Jyi Sze, Hsin-Chu, TW;
Shyh-Fann Ting, Tainan, TW;
Tzu-Jui Wang, Fengshan, TW;
Yen-Ting Chiang, Tainan, TW;
Yu-Jen Wang, Kaohsiung, TW;
Yuichiro Yamashita, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a semiconductor substrate having sidewalls that form one or more trenches. The one or more trenches are disposed along opposing sides of a photodiode and vertically extend from an upper surface of the semiconductor substrate to within the semiconductor substrate. A doped region is arranged along the upper surface of the semiconductor substrate and along opposing sides of the photodiode. A first dielectric lines the sidewalls of the semiconductor substrate and the upper surface of the semiconductor substrate. A second dielectric lines sidewalls and an upper surface of the first dielectric. The doped region has a width laterally between a side of the photodiode and a side of the first dielectric. The width of the doped region varies at different heights along the side of the photodiode.