The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2025

Filed:

Jul. 27, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Yi Yang, Fremont, CA (US);

Dongna Shen, San Jose, CA (US);

Yu-Jen Wang, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10N 50/80 (2023.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/85 (2023.01); B82Y 25/00 (2011.01);
U.S. Cl.
CPC ...
H10N 50/80 (2023.02); H10B 61/00 (2023.02); H10N 50/01 (2023.02); H10N 50/85 (2023.02); B82Y 25/00 (2013.01);
Abstract

A method for fabricating a magnetic tunneling junction (MTJ) structure is described. A first dielectric layer is deposited on a bottom electrode and partially etched through to form a first via opening having straight sidewalls, then etched all the way through to the bottom electrode to form a second via opening having tapered sidewalls. A metal layer is deposited in the second via opening and planarized to the level of the first dielectric layer. The remaining first dielectric layer is removed leaving an electrode plug on the bottom electrode. MTJ stacks are deposited on the electrode plug and on the bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and polished to expose a top surface of the MTJ stack on the electrode plug. A top electrode layer is deposited to complete the MTJ structure.


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