The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

May. 13, 2022
Applicant:

Avago Technologies International Sales Pte. Limited, Singapore, SG;

Inventors:

Arun Ramakrishnan, Lake Forest, CA (US);

Dharmendra Saraswat, Foothill Ranch, CA (US);

Reza Sharifi, Irvine, CA (US);

Sam Zhao, Irvine, CA (US);

Sam Karikalan, Ladera Ranch, CA (US);

Mayank Mayukh, Fort Collins, CO (US);

Liming Tsau, Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 23/50 (2006.01); H01L 23/538 (2006.01); H01L 25/16 (2023.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/4846 (2013.01); H01L 23/66 (2013.01); H01L 23/49827 (2013.01); H01L 23/50 (2013.01); H01L 23/5383 (2013.01); H01L 25/16 (2013.01); H01L 2223/6666 (2013.01);
Abstract

Novel tools and techniques are provided for implementing cantilevered power planes to provide a return current path for high-speed signals. In various embodiments, a semiconductor package includes a substrate core, a plurality of layers, and an AC coupler(s). The plurality of layers includes power, ground, and signal layers each layer disposed on or above the substrate core, each signal layer being disposed between a power layer and a ground layer, the power layer and the ground layer each providing a return path for high frequency (e.g., 1 kHz or greater) signals carried by each signal layer. Each dielectric layer is disposed between and in contact with a pair of power, ground, or signal layer. The AC coupler(s) is coupled to each of a power layer(s) and a ground layer(s), without any portion of any power layer that is near an edge of the substrate core being anchored to the substrate core.


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