The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2024

Filed:

Nov. 06, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Kristof Kuwawi Darmawikarta, Chandler, AZ (US);

Robert May, Chandler, AZ (US);

Sri Ranga Sai Boyapati, Austin, TX (US);

Srinivas V. Pietambaram, Chandler, AZ (US);

Chung Kwang Christopher Tan, Portland, OR (US);

Aleksandar Aleksov, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4857 (2013.01); H01L 21/481 (2013.01); H01L 21/486 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01);
Abstract

Disclosed herein are integrated circuit (IC) package supports and related apparatuses and methods. For example, in some embodiments, a method for forming an IC package support may include forming a first dielectric material having a surface; forming a first conductive via in the first dielectric material, wherein the first conductive via has tapered sidewalls with an angle that is equal to or less than 80 degrees relative to the surface of the first dielectric material; forming a second dielectric material, having a surface, on the first dielectric material; and forming a second conductive via in the second dielectric material, wherein the second conductive via is electrically coupled to the first conductive via, has tapered sidewalls with an angle that is greater than 80 degrees relative to the surface of the second dielectric material, and a maximum diameter between 2 microns and 20 microns.


Find Patent Forward Citations

Loading…