The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 24, 2024
Filed:
Jun. 24, 2021
Intel Corporation, Santa Clara, CA (US);
Jorge Parra, El Dorado Hills, CA (US);
Wei-yu Chen, San Jose, CA (US);
Kaiyu Chen, San Jose, CA (US);
Varghese George, Folsom, CA (US);
Junjie Gu, Santa Clara, CA (US);
Chandra Gurram, Folsom, CA (US);
Guei-Yuan Lueh, San Jose, CA (US);
Stephen Junkins, Bend, OR (US);
Subramaniam Maiyuran, Gold River, CA (US);
Supratim Pal, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A processing apparatus includes a processing resource including a general-purpose parallel processing engine and a matrix accelerator. The matrix accelerator includes first circuitry to receive a command to perform operations associated with an instruction, second circuitry to configure the matrix accelerator according to a physical depth of a systolic array within the matrix accelerator and a logical depth associated with the instruction, third circuitry to read operands for the instruction from a register file associated with the systolic array, fourth circuitry to perform operations for the instruction via one or more passes through one or more physical pipeline stages of the systolic array based on a configuration performed by the second circuitry, and fifth circuitry to write output of the operations to the register file associated with the systolic array.