The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2024

Filed:

Jun. 26, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Adel Elsherbini, Tempe, AZ (US);

Feras Eid, Chandler, AZ (US);

Georgios Dogiamis, Chandler, AZ (US);

Henning Braunisch, Phoenix, AZ (US);

Beomseok Choi, Chandler, AZ (US);

William J. Lambert, Tempe, AZ (US);

Stephen Morein, Chandler, AZ (US);

Ahmed Abou-Alfotouh, Chandler, AZ (US);

Johanna Swan, Scottsdale, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H05K 1/11 (2006.01); H05K 3/14 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/76879 (2013.01); H01L 23/53228 (2013.01); H05K 1/115 (2013.01); H05K 3/14 (2013.01);
Abstract

An integrated circuit (IC) die package substrate comprises a first trace upon, or embedded within, a dielectric material. The first trace comprises a first metal and a first via coupled to the first trace. The first via comprises the first metal and a second trace upon, or embedded within, the dielectric material. A second via is coupled to the second trace, and at least one of the second trace or the second via comprises a second metal with a different microstructure or composition than the first metal.


Find Patent Forward Citations

Loading…