The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2024

Filed:

Nov. 12, 2021
Applicant:

Powertech Technology Inc., Hsinchu, TW;

Inventors:

Shang-Yu Chang Chien, Hsinchu, TW;

Nan-Chun Lin, Hsinchu, TW;

Hung-Hsin Hsu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 21/56 (2006.01); H01L 21/762 (2006.01); H01L 23/66 (2006.01); H01Q 1/22 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/56 (2013.01); H01L 21/762 (2013.01); H01L 23/66 (2013.01); H01Q 1/2283 (2013.01); H01L 2223/6677 (2013.01);
Abstract

A fan-out semiconductor package includes: a redistribution structure; a functional chip coupled to the redistribution structure; an isolation structure disposed on the redistribution structure and including a body formed with through-holes; a shielding structure disposed on the isolation structure and the redistribution structure; a first conductive pattern structure disposed on the isolation structure and extending through the through-holes of the isolation structure; an encapsulating structure disposed on the isolation structure, the shielding structure and the first conductive pattern structure; and a second conductive pattern structure disposed on the encapsulating structure. A method for manufacturing the fan-out semiconductor package is also disclosed.


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