The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2024

Filed:

Jul. 21, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tzu-Ang Chao, Hsinchu, TW;

Gregory Michael Pitner, Sunnyvale, CA (US);

Tse-An Chen, Taoyuan, TW;

Lain-Jong Li, Hsinchu, TW;

Yu Chao Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); B01D 67/00 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01); H10K 10/46 (2023.01); H10K 10/84 (2023.01); H10K 71/00 (2023.01); H10K 71/12 (2023.01); H10K 85/20 (2023.01);
U.S. Cl.
CPC ...
B01D 67/00416 (2022.08); H01L 21/02606 (2013.01); H01L 29/0669 (2013.01); H01L 29/401 (2013.01); H01L 29/42356 (2013.01); H01L 29/42392 (2013.01); H01L 29/66045 (2013.01); H01L 29/78 (2013.01); H01L 29/7845 (2013.01); H01L 29/786 (2013.01); H10K 10/472 (2023.02); H10K 10/481 (2023.02); H10K 10/484 (2023.02); H10K 10/491 (2023.02); H10K 10/84 (2023.02); H10K 71/00 (2023.02); H10K 71/12 (2023.02); H10K 85/221 (2023.02);
Abstract

A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.


Find Patent Forward Citations

Chao, Tzu-Ang. (2024). Method of manufacturing semiconductor devices including the steps of removing one or more of the nanotubes from the stack of nanotubes, and/or removing spacers that surrounds each of the plurality of nanotubes, and forming gate dielectric and/or gate electrode to the nanotubes (U.S. Patent No. 12151213). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12151213

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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