The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2024
Filed:
Jan. 25, 2022
United Microelectronics Corp., Hsin-Chu, TW;
Chun-Hsien Huang, Tainan, TW;
Yu-Tse Kuo, Tainan, TW;
Shu-Ru Wang, Taichung, TW;
Chien-Hung Chen, Taipei, TW;
Li-Ping Huang, Miaoli County, TW;
Chun-Yen Tseng, Tainan, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
The present invention provides a layout pattern of static random access memory, comprising a PU(first pull-up transistor), a PU(second pull-up transistor), a PDA (first pull-down transistor), a PDB (second pull-down transistor), a PDA (third pull-down transistor), a PDB (fourth pull-down transistor), a PGA (first access transistor), a PGB (second access transistor), a PGA (third access transistor) and a PGB (fourth access transistor) located on the substrate. The PDA and the PDB are connected in parallel with each other, the PDA and the PDB are connected in parallel with each other, wherein the gate structures include a first J-shaped gate structure, and the first J-shaped gate structure is an integrally formed structure.