The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2024
Filed:
Jul. 26, 2021
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Yi Yang Wei, Hsinchu, TW;
Tzu-Yu Lin, Hsinchu, TW;
Bi-Shen Lee, Hsinchu, TW;
Hai-Dang Trinh, Hsinchu, TW;
Hsing-Lien Lin, Hsin-Chu, TW;
Hsun-Chung Kuang, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
Ferroelectric stacks are disclosed herein that can improve retention performance of ferroelectric memory devices. An exemplary ferroelectric stack has a ferroelectric switching layer (FSL) stack disposed between a first electrode and a second electrode. The ferroelectric stack includes a barrier layer disposed between a first FSL and a second FSL, where a first crystalline condition of the barrier layer is different than a second crystalline condition of the first FSL and/or the second FSL. In some embodiments, the first crystalline condition is an amorphous phase, and the second crystalline condition is an orthorhombic phase. In some embodiments, the first FSL and/or the second FSL include a first metal oxide, and the barrier layer includes a second metal oxide. The ferroelectric stack can be a ferroelectric capacitor, a portion of a transistor, and/or connected to a transistor in a ferroelectric memory device to provide data storage in a non-volatile manner.