The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2024
Filed:
Oct. 29, 2021
Applicant:
Stats Chippac Pte. Ltd., Singapore, SG;
Inventors:
HunTeak Lee, Gyeonggi-do, KR;
KyoungHee Park, Seoul, KR;
KyungHwan Kim, Seoul, KR;
SeungHyun Lee, Incheon, KR;
SangJun Park, Incheon, KR;
Assignee:
STATS ChipPAC Pte. Ltd., Singapore, SG;
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/36 (2006.01); H01L 23/552 (2006.01); H01Q 1/22 (2006.01); H05K 3/34 (2006.01); H01L 23/498 (2006.01); H01L 25/16 (2023.01); H01R 12/71 (2011.01);
U.S. Cl.
CPC ...
H01Q 1/2283 (2013.01); H01L 21/56 (2013.01); H01L 23/3121 (2013.01); H01L 23/36 (2013.01); H01L 23/552 (2013.01); H05K 1/181 (2013.01); H05K 3/3436 (2013.01); H01L 23/49816 (2013.01); H01L 25/16 (2013.01); H01R 12/716 (2013.01); H05K 2201/10098 (2013.01); H05K 2201/10189 (2013.01);
Abstract
A semiconductor device has a PCB with an antenna and a semiconductor package mounted onto the PCB. An epoxy molding compound bump is formed or disposed over the PCB opposite the semiconductor package. A first shielding layer is formed over the PCB. A second shielding layer is formed over the semiconductor package. A board-to-board (B2B) connector is disposed on the PCB or as part of the semiconductor package. A conductive bump is disposed between the semiconductor package and PCB.