The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2024

Filed:

Jul. 22, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Shu-Bin Hsu, Taichung, TW;

Ren-Guei Lin, Taichung, TW;

Feng-Inn Wu, Taichung, TW;

Sheng-Chen Wang, Taichung, TW;

Jung-Yu Li, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B24B 37/26 (2012.01); B24B 49/00 (2012.01); B24B 49/10 (2006.01); B24B 49/16 (2006.01); B24B 57/02 (2006.01);
U.S. Cl.
CPC ...
B24B 37/26 (2013.01); B24B 49/00 (2013.01); B24B 49/10 (2013.01); B24B 49/16 (2013.01); B24B 57/02 (2013.01);
Abstract

A method includes supplying slurry onto a polishing pad; holding a wafer against the polishing pad with a piezoelectric layer interposed vertically between a pressure unit and the wafer; exerting a force on the piezoelectric layer using the pressure unit to make the piezoelectric layer directly press the wafer; generating, using the piezoelectric layer, a first voltage corresponding to a first portion of the wafer and a second voltage corresponding to a second portion of the wafer; tuning the force exerted on the piezoelectric layer according to the first voltage and the second voltage; and polishing, using the polishing pad, the wafer.


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