The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2024

Filed:

Apr. 28, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Szu-Wei Tseng, Hsinchu, TW;

Jiun-Ming Kuo, Taipei, TW;

Yuan-Ching Peng, Hsinchu, TW;

Kuo-Yi Chao, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/311 (2006.01); H01L 21/8234 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0886 (2013.01); H01L 21/31116 (2013.01); H01L 21/823431 (2013.01); H01L 21/823456 (2013.01); H01L 21/823481 (2013.01); H01L 29/42376 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01);
Abstract

The embodiments of the disclosure provide a FinFET. The FinFET includes a substrate, a first gate stack and a second gate stack. The substrate has a first fin and a second fin. The first gate stack is across the first fin and extends along a widthwise direction of the first fin. The second gate stack is across the second fin and extends along a widthwise direction of the second fin. A bottommost surface of the first gate stack is lower than a bottommost surface of the second gate stack, and a first gate height of the first gate stack directly on the first fin is substantially equal to a second gate height of the second gate stack directly on the second fin.


Find Patent Forward Citations

Loading…