The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2024

Filed:

Jul. 27, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Shin-Puu Jeng, Hsinchu, TW;

Feng-Cheng Hsu, New Taipei, TW;

Shuo-Mao Chen, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/13 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 23/13 (2013.01); H01L 23/49833 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 25/50 (2013.01); H01L 25/18 (2013.01); H01L 2224/16148 (2013.01); H01L 2224/16238 (2013.01);
Abstract

A package structure and a method of forming the same are provided. The package structure includes a package substrate, an interposer substrate, and a semiconductor device. The interposer substrate is disposed over the package substrate, wherein the interposer substrate has a bottom surface facing the package substrate and a first cavity formed on the bottom surface. The semiconductor device is disposed in the first cavity. The package substrate has a top surface facing the interposer substrate and a second cavity formed on the top surface, wherein the second cavity is configured to accommodate the semiconductor device.


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