The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2024

Filed:

Apr. 20, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Te-Chih Hsiung, Taipei, TW;

Yi-Chun Chang, Hsinchu, TW;

Jyun-De Wu, New Taipei, TW;

Yi-Chen Wang, Hsinchu County, TW;

Yuan-Tien Tu, Chiayi County, TW;

Huan-Just Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76826 (2013.01); H01L 21/76802 (2013.01); H01L 21/76804 (2013.01); H01L 21/76831 (2013.01); H01L 21/76832 (2013.01); H01L 23/5226 (2013.01); H01L 23/53295 (2013.01); H01L 21/31116 (2013.01); H01L 21/76877 (2013.01);
Abstract

A semiconductor device includes a gate structure, source/drain regions, source/drain contacts, a gate dielectric cap, an etch stop layer, and a gate contact. The gate structure is over a substrate. The source/drain regions are at opposite sides of the gate structure. The source/drain contacts are over the source/drain regions, respectively. The gate dielectric cap is over the gate structure and has opposite sidewalls interfacing the source/drain contacts.


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