The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2024

Filed:

Jun. 09, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Jen-Fu Liu, Hsinchu, TW;

Ming Hung Tseng, Miaoli County, TW;

Yen-Liang Lin, Taichung, TW;

Li-Ko Yeh, Hsinchu, TW;

Hui-Chun Chiang, Hsinchu, TW;

Cheng-Chieh Wu, Hsinchu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 21/565 (2013.01); H01L 23/3121 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 24/05 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/83 (2013.01); H01L 24/94 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/2101 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/33181 (2013.01); H01L 2924/181 (2013.01); H01L 2924/37001 (2013.01);
Abstract

A semiconductor structure includes a first die; a second die disposed over the first die; a plurality of first conductive vias adjacent to the first die. The semiconductor structure further includes a plurality of second conductive vias disposed over the first conductive vias, each of the second conductive vias corresponding to one of the first conductive vias; a plurality of third conductive vias disposed over the first die and adjacent to the second die; and a molding material encapsulating the first die, the second die, the first conductive vias, the second conductive vias and the third conductive vias. A stepped shape is formed around an interface between each of the first conductive vias and the corresponding one of the second conductive vias.


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