The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2024

Filed:

Dec. 08, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chieh Lee, Hsinchu, TW;

Yi-Ching Liu, Hsinchu, TW;

Chia-En Huang, Xinfeng Township, Hsinchu County, TW;

Wen-Chang Cheng, Richmond, TX (US);

Jonathan Tsung-Yung Chang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G11C 11/4091 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); H10B 12/09 (2023.02); H10B 12/50 (2023.02);
Abstract

A memory structure includes a first memory array having bit lines; a second memory array having bit lines; a first sense amplifier connected to a first bit line of the first memory array and a first bit line of the second memory array; and a second sense amplifier connected to a second bit line of the first memory array and a second bit line of the second memory array. The second bit line of the first memory array is adjacent to the first bit line of the first memory array, and the second bit line of the second memory array is adjacent to the first bit line of the second memory array.


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