The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2024

Filed:

Dec. 23, 2019
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Ting-Yu Yeh, Hsinchu, TW;

Chia-Hao Hsu, Hsinchu, TW;

Weiming Chris Chen, Taipei, TW;

Kuo-Chiang Ting, Hsinchu, TW;

Tu-Hao Yu, Hsin-Chu, TW;

Shang-Yun Hou, Hsinchu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/373 (2006.01); H01L 21/66 (2006.01); H01L 23/00 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3735 (2013.01); H01L 22/32 (2013.01); H01L 23/562 (2013.01); H01L 24/17 (2013.01); H01L 27/0688 (2013.01); H01L 2924/3511 (2013.01); H01L 2924/3512 (2013.01);
Abstract

A semiconductor package structure includes a substrate, a first semiconductor and a second semiconductor over the substrate, and a multi-TIM structure disposed over the first semiconductor die and the second semiconductor die. The first semiconductor die includes a first heat output and the second semiconductor die includes a second heat output less than the first heat output. The multi-TIM structure includes a first TIM layer disposed over at least a portion of the first semiconductor die and a second TIM layer. A thermal conductivity of the first TIM layer is higher than a thermal conductivity of the second TIM layer. The first TIM layer covers the first semiconductor die.


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