The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2024

Filed:

Dec. 22, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Xiaoqian Li, Chandler, AZ (US);

Nitin Deshpande, Chandler, AZ (US);

Omkar Karhade, Chandler, AZ (US);

Ravindranath V. Mahajan, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); H01L 23/00 (2006.01); H01L 23/367 (2006.01); H01L 25/16 (2023.01);
U.S. Cl.
CPC ...
G02B 6/4292 (2013.01); G02B 6/423 (2013.01); G02B 6/4243 (2013.01); G02B 6/4268 (2013.01); H01L 23/3675 (2013.01); H01L 24/16 (2013.01); H01L 25/167 (2013.01); H01L 2224/16145 (2013.01);
Abstract

A semiconductor package comprises an interposer and a photonics die. The photonics die has a front side with an on-chip fiber connector and solder bumps, the photonics die over the interposer with the on-chip fiber connector and the solder bumps facing away from the interposer. A patch substrate is mounted on the interposer adjacent to the photonics die. A logic die is mounted on the patch substrate with an overhang past an edge of the patch substrate and the overhang is attached to the solder bumps of the photonics die. An integrated heat spreader (IHS) is over the logic die such that the photonics die does not directly contact the IHS.


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