The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2024
Filed:
Jan. 17, 2022
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Jia-En Lee, Hsinchu, TW;
Po-Yu Huang, Hsinchu, TW;
Shih-Che Lin, Hsinchu, TW;
Chao-Hsun Wang, Chung-Li, TW;
Kuo-Yi Chao, Hsinchu, TW;
Mei-Yun Wang, Chu-Pei, TW;
Feng-Yu Chang, Kaohsiung, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
Methods to form vertically conducting and laterally conducting low-cost resistor structures utilizing dual-resistivity conductive materials are provided. The dual-resistivity conductive materials are deposited in openings in a dielectric layer using a single deposition process step. A high-resistivity β-phase of tungsten is stabilized by pre-treating portions of the dielectric material with impurities. The portions of the dielectric material in which impurities are incorporated encompass regions laterally adjacent to where high-resistivity β-W is desired. During a subsequent tungsten deposition step the impurities may out-diffuse and get incorporated in the tungsten, thereby stabilizing the metal in the high-resistivity β-W phase. The β-W converts to a low-resistivity α-phase of tungsten in the regions not pre-treated with impurities.