The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2024

Filed:

Jun. 01, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Nazila Haratipour, Hillsboro, OR (US);

Sou-Chi Chang, Portland, OR (US);

Chia-Ching Lin, Portland, OR (US);

Jack Kavalieros, Portland, OR (US);

Uygar Avci, Portland, OR (US);

Ian Young, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/51 (2006.01); H01L 29/15 (2006.01); H01L 29/221 (2006.01); H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
H01L 29/516 (2013.01); H01L 29/151 (2013.01); H01L 29/221 (2013.01); H01L 29/945 (2013.01);
Abstract

Described is a ferroelectric-based capacitor that improves reliability of a ferroelectric memory by providing tensile stress along a plane (e.g., x-axis) of a ferroelectric or anti-ferroelectric material of the ferroelectric/anti-ferroelectric based capacitor. Tensile stress is provided by a spacer comprising metal, semimetal, or oxide (e.g., metal or oxide of one or more of: Al, Ti, Hf, Si, Ir, or N). The tensile stress provides polar orthorhombic phase to the ferroelectric material and tetragonal phase to the anti-ferroelectric material. As such, memory window and reliability of the ferroelectric/anti-ferroelectric oxide thin film improves.


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