The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2024
Filed:
Oct. 25, 2022
Intel Corporation, Santa Clara, CA (US);
Jeffrey Chromczak, Toronto, CA;
Chooi Pei Lim, Penang, MY;
Lai Guan Tang, Penang, MY;
Chee Hak Teh, Penang, MY;
MD Altaf Hossain, Portland, OR (US);
Dheeraj Subbareddy, Portland, OR (US);
Ankireddy Nalamalpu, Portland, OR (US);
Altera Corporation, San Jose, CA (US);
Abstract
An integrated circuit die includes input buffer circuits that are enabled during an input mode of operation in response to first control signals to transmit input signals into the integrated circuit die from conductive bumps. Each of the input buffer circuits is coupled to one of the conductive bumps. The integrated circuit die also includes output buffer circuits that are each coupled to one of the conductive bumps. The output buffer circuits are enabled during an output mode of operation in response to second control signals to transmit output signals from the integrated circuit die to the conductive bumps. The input buffer circuits are disabled from transmitting signals during the output mode of operation in response to the first control signals. The output buffer circuits are disabled from transmitting signals during the input mode of operation in response to the second control signals.