The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2024

Filed:

Dec. 15, 2021
Applicant:

Kepler Computing Inc., San Francisco, CA (US);

Inventors:

Somilkumar J. Rathi, San Jose, CA (US);

Noriyuki Sato, Hillsboro, OR (US);

Niloy Mukherjee, San Ramon, CA (US);

Rajeev Kumar Dokania, Beaverton, OR (US);

Amrita Mathuriya, Portland, OR (US);

Tanay Gosavi, Portland, OR (US);

Pratyush Pandey, Kensington, CA (US);

Jason Y. Wu, Albany, CA (US);

Sasikanth Manipatruni, Portland, OR (US);

Assignee:

Kepler Computing Inc., San Francisco, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 53/30 (2023.01);
U.S. Cl.
CPC ...
H10B 53/30 (2023.02);
Abstract

A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A trench capacitor including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density dielectric material.


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