The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2024
Filed:
Dec. 27, 2022
Intel Corporation, Santa Clara, CA (US);
Robert Starkston, Phoenix, AZ (US);
Debendra Mallik, Chandler, AZ (US);
John S. Guzek, Chandler, AZ (US);
Chia-Pin Chiu, Tempe, AZ (US);
Deepak Kulkarni, Chandler, AZ (US);
Ravi V. Mahajan, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.