The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2024
Filed:
Nov. 08, 2021
Applicant:
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Inventors:
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); B81B 7/00 (2006.01); B81C 3/00 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/17 (2013.01); B81B 7/007 (2013.01); B81C 3/001 (2013.01); H01L 24/11 (2013.01); H01L 24/16 (2013.01); B81B 2207/012 (2013.01); B81B 2207/098 (2013.01); B81C 2203/035 (2013.01); B81C 2203/0792 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/11825 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/1703 (2013.01); H01L 2224/17517 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/1461 (2013.01);
Abstract
A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.