The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2024

Filed:

Sep. 30, 2021
Applicant:

Richtek Technology Corporation, Zhubei, TW;

Inventors:

Hao-Lin Yen, Taoyuan, TW;

Heng-Chi Huang, Hsinchu, TW;

Yong-Zhong Hu, Cupertino, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49568 (2013.01); H01L 21/4825 (2013.01); H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/3114 (2013.01); H01L 23/49503 (2013.01); H01L 23/4952 (2013.01);
Abstract

A chip packaging method includes: providing a wafer, on which multiple bumps are formed; cutting the wafer into multiple chip units, wherein multiple vertical heat conduction elements are formed on the wafer or the chip units; disposing the chip units on a base material; and providing a package material to encapsulate lateral sides and a bottom surface of each of the chip units, to form a chip package unit, wherein the bottom surface of the chip unit faces the base material; wherein, in the chip package unit, the bumps on the chip units abut against the base material, and wherein the vertical heat conduction elements directly connect to the base material, or the base material includes multiple through-holes and the vertical heat conduction elements pass through the multiple through-holes in the base material.


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