The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2024

Filed:

Nov. 07, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Kuo-Hsiu Hsu, Taoyuan County, TW;

Yu-Kuan Lin, Taipei, TW;

Feng-Ming Chang, Hsinchu County, TW;

Hsin-Wen Su, Hsinchu, TW;

Lien Jung Hung, Taipei, TW;

Ping-Wei Wang, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); G06F 30/392 (2020.01); G11C 11/412 (2006.01); H01L 21/762 (2006.01); H01L 27/092 (2006.01); H10B 10/00 (2023.01);
U.S. Cl.
CPC ...
H01L 21/823878 (2013.01); G06F 30/392 (2020.01); G11C 11/412 (2013.01); H01L 21/76224 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 27/0924 (2013.01); H10B 10/12 (2023.02);
Abstract

A method of forming an integrated circuit, including forming a n-type doped well (N-well) and a p-type doped well (P-well) disposed side by side on a semiconductor substrate, forming a first fin active region extruded from the N-well and a second fin active region extruded from the P-well, forming a first isolation feature inserted between and vertically extending through the N-well and the P-well, and forming a second isolation feature over the N-well and the P-well and laterally contacting the first and the second fin active regions.


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