The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2024
Filed:
Sep. 16, 2021
International Business Machines Corporation, Armonk, NY (US);
Soon-Cheon Seo, Glenmont, NY (US);
Dexin Kong, Redmond, WA (US);
Takashi Ando, Eastchester, NY (US);
Paul Charles Jamison, Hopewell Junction, NY (US);
Hiroyuki Miyazoe, White Plains, NY (US);
Youngseok Kim, Upper Saddle River, NJ (US);
Nicole Saulnier, Slingerlands, NY (US);
Vijay Narayanan, New York, NY (US);
Iqbal Rashid Saraf, Glenmont, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Structures and methods are provided for integrating a resistance random access memory (ReRAM) in a back-end-on-the-line (BEOL) fat wire level. In one embodiment, a ReRAM device area contact structure is provided in the BEOL fat wire level that has at least a lower via portion that contacts a surface of a top electrode of a ReRAM device area ReRAM-containing stack. In other embodiments, a tall ReRAM device area bottom electrode is provided in the BEOL fat wire level and embedded in a dielectric material stack that includes a dielectric capping layer and an interlayer dielectric material layer.