The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2024
Filed:
Aug. 27, 2021
Applicant:
Taiwan Seminconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
De-Yang Chiou, Hsinchu, TW;
Fu-Ting Yen, Hsinchu, TW;
Yu-Yun Peng, Hsinchu, TW;
Keng-Chu Lin, Ping-Tung, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 24/32 (2013.01); H01L 23/481 (2013.01); H01L 24/29 (2013.01); H01L 24/83 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/29188 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/83013 (2013.01); H01L 2224/83896 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/05042 (2013.01); H01L 2924/05442 (2013.01); H01L 2924/3512 (2013.01);
Abstract
The present disclosure describes a semiconductor structure having bonded wafers with storage layers and a method to bond wafers with storage layers. The semiconductor structure includes a first wafer including a first storage layer with carbon, a second wafer including a second storage layer with carbon, and a bonding layer interposed between the first and second wafers and in contact with the first and second storage layers.