The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2024
Filed:
Oct. 26, 2020
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Ming-Shiang Lin, Hsinchu, TW;
Chia-Cheng Ho, Hsinchu, TW;
Chun-Chieh Lu, Taipei, TW;
Cheng-Yi Peng, Taipei, TW;
Chih-Sheng Chang, Hsinchu, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/417 (2006.01); G01R 27/26 (2006.01); H01L 21/283 (2006.01); H01L 21/306 (2006.01); H01L 21/324 (2006.01); H01L 21/66 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 22/14 (2013.01); G01R 27/2617 (2013.01); H01L 22/34 (2013.01);
Abstract
A method includes forming a dummy pattern over test region of a substrate; forming an interlayer dielectric (ILD) layer laterally surrounding the dummy pattern; removing the dummy pattern to form an opening; forming a dielectric layer in the opening; performing a first testing process on the dielectric layer; performing an annealing process to the dielectric layer; and performing a second testing process on the annealed dielectric layer.