The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2024

Filed:

May. 10, 2021
Applicant:

Zhongke Jingyuan Electron Limited, Beijing (Cn), Beijing, CN;

Inventors:

Weimin Ma, Beijing, CN;

Chunying Han, Beijing, CN;

Chengcheng Liu, Beijing, CN;

Shouyan Huang, Being, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/20 (2006.01); G03F 7/00 (2006.01); G03F 9/00 (2006.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
G03F 9/7076 (2013.01); G03F 7/70633 (2013.01); H01L 23/544 (2013.01); H01L 2223/54426 (2013.01);
Abstract

An overlay alignment mark located in a patterned wafer and a method for measuring overlay error are provided, the patterned wafer having a lower-layer pattern in a first layer thereof and an upper-layer pattern in a second layer thereof above the first layer, the overlay alignment mark comprising: a first pattern, which is a portion of the lower-layer pattern and comprises a pair of solid features formed in the first layer; and a second pattern, which is a portion of the upper-layer pattern and comprises two pairs of hollowed features formed in the second layer, with two imaginary lines connecting between geometric centers of respective pairs in the two pairs of hollowed features extending in two mutually orthogonal directions, respectively; an orthographic projection of the pair of solid features on the wafer at least partially overlaps with an orthographic projection of a respective pair of hollowed features on the wafer.


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