The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2024
Filed:
Feb. 13, 2023
Intel Corporation, Santa Clara, CA (US);
Prasoonkumar Surti, Folsom, CA (US);
Narayan Srinivasa, Portland, OR (US);
Feng Chen, Shanghai, CN;
Joydeep Ray, Folsom, CA (US);
Ben J. Ashbaugh, Folsom, CA (US);
Nicolas C. Galoppo Von Borries, Portland, OR (US);
Eriko Nurvitadhi, Hillsboro, OR (US);
Balaji Vembu, Folsom, CA (US);
Tsung-Han Lin, Campbell, CA (US);
Kamal Sinha, Rancho Cordova, CA (US);
Rajkishore Barik, Santa Clara, CA (US);
Sara S. Baghsorkhi, San Jose, CA (US);
Justin E. Gottschlich, Santa Clara, CA (US);
Altug Koker, El Dorado Hills, CA (US);
Nadathur Rajagopalan Satish, Santa Clara, CA (US);
Farshad Akhbari, Chandler, AZ (US);
Dukhwan Kim, San Jose, CA (US);
Wenyin Fu, Folsom, CA (US);
Travis T. Schluessler, Hillsboro, OR (US);
Josh B. Mastronarde, Sacramento, CA (US);
Linda L. Hurd, Cool, CA (US);
John H. Feit, Folsom, CA (US);
Jeffery S. Boles, Folsom, CA (US);
Adam T. Lake, Portland, OR (US);
Karthik Vaidyanathan, Berkeley, CA (US);
Devan Burke, Portland, OR (US);
Subramaniam Maiyuran, Gold River, CA (US);
Abhishek R. Appu, El Dorado Hills, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments provide mechanisms to facilitate compute operations for deep neural networks. One embodiment comprises a graphics processing unit comprising one or more multiprocessors, at least one of the one or more multiprocessors including a register file to store a plurality of different types of operands and a plurality of processing cores. The plurality of processing cores includes a first set of processing cores of a first type and a second set of processing cores of a second type. The first set of processing cores are associated with a first memory channel and the second set of processing cores are associated with a second memory channel.